As the topic states, I am working on a homebrew LPC modchip using the SST 49LF004B.
I could not find a diagram online so I gathered the required info myself and constructed my own diagram.
I don't have the chip here with me or I would test it myself.
I just need someone to concur that my diagram looks/is correct.
According to the data sheet on the chip:
The MODE pin must be held low to put the chip into LPC mode.
The CE# pin must be held low to enable the chip.
The WP# must be held high (low for write protect) to disable write protect to the data area of the chip.
The TBL# pin must be held high (low for write protect) to disable write protect for the boot block of the chip.
So, What do you guys think? Any input is good input.