2/ X3 2914 BIOS hacked which tested on Smartxx modchip on xbox 1.6. Does anyone use this on any other modchip like X2 and on other xbox version?
I've booted it on a prototype CleverMod Sunday chip. I can verify that you can not split that bios and it takes the entire 1mb.
I have questions about adding support for the software locking block registers on the new SST49LF004A/B chips the flashbios source I have for 3.0.1-3 has the Device ID code included. SST makes the A chip and B chip on the same ID, crappy. Also the B version now widely available is software write protected in a method other than the SDP commands. My So-far- nonworking code looks similiar to this:
#define T_BLOCK_LK (FLASH_BASE_ADDRESS+0x30002) //0xFFBF0002
#define T_MINUS01_LK (FLASH_BASE_ADDRESS+0x20002) //0xFFBE0002
#define T_MINUS02_LK (FLASH_BASE_ADDRESS+65538) //0xFFBD0002
#define T_MINUS03_LK (FLASH_BASE_ADDRESS+2) // positive 0xFFBC0002
#define T_MINUS04_LK (FLASH_BASE_ADDRESS-0xfffe) //0xFFBB0002
#define T_MINUS05_LK (FLASH_BASE_ADDRESS-0x1fffe) //0xFFBA0002
#define T_MINUS06_LK (FLASH_BASE_ADDRESS-0x2fffe) //0xFFB90002
#define T_MINUS07_LK (FLASH_BASE_ADDRESS-0x3fffe) //0xFFB80002
#define Unlock 0x00
as my defines then later I just tried to write to those locations that by default contain 0x01 and need tobe 0x00 to disable the software lock as perThis Data Sheet
pages 21 and 22.
I've been able to read the values are indeed 0x01 like the datasheet describes after power up so my code is finding the right locations, then I got busy on other things. Obviously these code examples are really experimental. According to SST you don't need to use the SDP here is my email with them. Is there any chance of getting this included in the flashbios source?
The hardware write protection (WP# and TBL# pins) is independent of the
software write protection (block locking register). The previous LPC
devices did not have the block locking registers. All 8 block locking
registers default to write locked (data=0x01) at power-up, they must be
unlocked (data 0x00) before the user can write to the array. These
registers are also reset to the write lock state after driving either
the RST# or INIT# pin to low. Thus, you need to modify your code to
write data 0x00 to each block locking register (total 8 write commands,
the SDP sequence is not required) after every power-down/power-up or
Silicon Storage Technology, Inc.