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RGH CPLD DualNAND Mod v0.1 for CoolRunner
Posted by XanTium | February 13 23:34 EST | News Category: Xbox360
 
Team CodeXecution.Com & Team ModControl.Com released RGH CPLD DualNAND Mod v0.1:
[QUOTE]
This little CPLD mod allows you to switch two nands directly with an installed Cool Runner like TX Cool Runner or other devices with the same chipset on your reset glitch hacked xbox 360 console.
The modified code isnt locked to a modchip, it isnt that special and you can play with the sourcecode soon to add more functions when you want to do so.

Installation:
Add a 2nd NAND to your Xbox 360 (see pictures/documentations), flash the XSVF file to your TX Cool Runner (or other devices with the same Xilinx CPLD) as usual, switch the NAND with the snyc button while coldboot the xbox 360.

Example:
OrigNAND: power on the xbox and hold the sync button until you see the ring of light
2nd NAND (with freeBOOT): power on your console as always (pressing power to use freeboot, hit eject to use xell/xellous/ xell reloaded)

Note:
Our current mod is only available for xbox 360 trinity (slim) mainboards, a port to other mainboards, sourcecode and a better documentation will be released very soon.
Use it at your own risk on Xbox Live!!!
[/QUOTE]

Official Site/Download: modcontrol.com | codexecution.com





rastaman108037
Forgive me if I'm a little daft on the mod, but do you need any other mods other than the CPLD to do dual-nand? If I'm to understand correctly, all you need is the CPLD/RGH wiring?

Also since everyone else does it.....first?
Jumpy_Beans
QUOTE(rastaman108037 @ Feb 13 2012, 11:55 PM) *

Forgive me if I'm a little daft on the mod, but do you need any other mods other than the CPLD to do dual-nand? If I'm to understand correctly, all you need is the CPLD/RGH wiring?

Also since everyone else does it.....first?

I believe they also installed a nandwhich on that xbox, the only real difference is the code on the CPLD chip.
wmb88
it seems no one else can do what the cygnos guys have done.
to cut the CE track on the motherboard is a pain.....
cornnatron
Thats why i got me cygnos rev e but would like
A option where it would just switch off the coolrunner when
It boots of original nand and boot coolrunner with cygnos nand
But without relay thought of leeching the 3.3v of the cygnos but
Heard that is not a good plan.

If anyone has some ideees glad to hear them

Corn
warbeast
QUOTE(cornnatron @ Feb 14 2012, 02:51 PM) *

Thats why i got me cygnos rev e but would like
A option where it would just switch off the coolrunner when
It boots of original nand and boot coolrunner with cygnos nand
But without relay thought of leeching the 3.3v of the cygnos but
Heard that is not a good plan.

If anyone has some ideees glad to hear them

Corn

i just leave my cpld on all the time now but i did have a 2nd switch on the cygnos usb board going to the 3.3v on/off for cpld so i just flick both switchers togther
also i hooked it to a blue led on the center ring of light to show when its on

but all the extra wire on the 3.3v cpld made it glitch slower so i got fed up with it real quick
jayboy86
QUOTE(wmb88 @ Feb 14 2012, 01:13 PM) *

it seems no one else can do what the cygnos guys have done.
to cut the CE track on the motherboard is a pain.....


thats incorrect, TX demon will be out in a matter of weeks and requires no trace cutting and will show the cygnos360 for what it is, crap.
dave11674
so is that a second nand soldered directly on top of the orig one ? with just one leg left up for the CE line to the pin ?

i may give this a try on my mates slim lol smile.gif

good idea smile.gif

if we can get hold of the flash chips hehehe

on a second note. do we flash our nandimage.bin file manually to the spare nand ? or jtag it in ?

instructions are a bit iffy

dave
darayden
QUOTE
TX demon will be out in a matter of weeks and requires no trace cutting


How do you know that?? where you getting the release info from??
thugsters
QUOTE(darayden @ Feb 14 2012, 05:10 PM) *

How do you know that?? where you getting the release info from??

Not that hard, I don't cut my southbridge when doing the nandwich mods. Use 2 10k pullups and done.
darayden
@ Thugsters

why are you quoting me?? I was asking how they guy new about the release od DEMON in the next few weeks..

DO you have a guide for the way you dual nand your consoles? you doin Fat or just Slim?
thugsters
QUOTE(darayden @ Feb 14 2012, 07:10 PM) *

@ Thugsters

why are you quoting me?? I was asking how they guy new about the release od DEMON in the next few weeks..

DO you have a guide for the way you dual nand your consoles? you doin Fat or just Slim?


Doing both.

Haha didn't even notice that, sorry quoted wrong person tongue.gif

meant to quote jayboy86 on his comment.
QUOTE
thats incorrect, TX demon will be out in a matter of weeks and requires no trace cutting and will show the cygnos360 for what it is, crap.


Here's a quick simple Diagram

Here's some diagrams found on another site for those interested.

1st. Nandwich

2nd.Sync

3rd.Glitch wiring

4th.Complete outlook
dave11674
QUOTE(thugsters @ Feb 14 2012, 10:33 PM) *

Doing both.

Haha didn't even notice that, sorry quoted wrong person tongue.gif

meant to quote jayboy86 on his comment.
Here's a quick simple Diagram

Here's some diagrams found on another site for those interested.

1st. Nandwich

2nd.Sync

3rd.Glitch wiring

4th.Complete outlook



thanks for the pics mate
so this will basically work with any type of coolrunner IC that sports a jed file.
just the 10k res and a couple of extra wires and the nandwich smile.gif

cool may give this a try
dont look like too much work

ill check farnells to see if i can grab these flash chips

dave
ruciz
Awesome work on this.

QUOTE(thugsters @ Feb 14 2012, 11:33 PM) *

Doing both.

Haha didn't even notice that, sorry quoted wrong person tongue.gif

meant to quote jayboy86 on his comment.
Here's a quick simple Diagram

Here's some diagrams found on another site for those interested.

1st. Nandwich

2nd.Sync

3rd.Glitch wiring

4th.Complete outlook


the simple diagram looks incorrect.
the NANDs CE are both held high through a 10K all the time i believe. connecting the line turns ON the NAND. If they are not held high when disabled they float and battle and nothing boots... Add a few resistors and done.

Both CE pins should be lifted and tied to the glitch chip, then no traces need to be cut guys.

however cutting a trace is usually easier than lifting a mm wide pin without ruining its pad.
thugsters
QUOTE(ruciz @ Feb 14 2012, 09:14 PM) *

Awesome work on this.
the simple diagram looks incorrect.
the NANDs CE are both held high through a 10K all the time i believe. connecting the line turns ON the NAND. If they are not held high when disabled they float and battle and nothing boots... Add a few resistors and done.

Both CE pins should be lifted and tied to the glitch chip, then no traces need to be cut guys.

however cutting a trace is usually easier than lifting a mm wide pin without ruining its pad.


You don't need to lift the original nand ce pin. Just run from bottom of board FT1T1 smile.gif
jayboy86
I didn't say a few weeks, I said a matter of weeks. The software for the demon has been completed which is the final step before release dates are confirmed. An image was released showing the software and specifications of the product, indicating no trace cuts but this was confirmed by uber on the tx forums previous to the release of this image. Won't be long now
ruciz
QUOTE(thugsters @ Feb 15 2012, 02:06 AM) *

You don't need to lift the original nand ce pin. Just run from bottom of board FT1T1 smile.gif


If you don't lift the pin you are going to cut the trace.. Choose one. Not sure about FT1T1 point, but if you lifted the pin you could solder the SB from the glitch chip to that then.

QUOTE(dave11674 @ Feb 14 2012, 08:45 PM) *

so is that a second nand soldered directly on top of the orig one ? with just one leg left up for the CE line to the pin ?

i may give this a try on my mates slim lol smile.gif

good idea smile.gif

if we can get hold of the flash chips hehehe

on a second note. do we flash our nandimage.bin file manually to the spare nand ? or jtag it in ?

instructions are a bit iffy

dave


Exactly.
Bend the pins on the harvested/2nd nand 100% to the chips side. This should make it 'nandwich' well and easy to solder. tack some points, flood and braid. If you don't want to do that, theres only certain points that need to be connected really. Read the schematic and build a breakout board, and manually wire!

I would first wire it with a manual switch. Tie each CE pin high through 10k to 3v3, and have a manual toggle (SPDT) the CE switch to the mainboard when enabling.
Using your NAND programmer, ensure you can read/write both NANDs before powering up. This is where I would restore my nanddump.bin to, one of these, RGH-bin to the other. Remember which one when wiring CLPD. The power will need to be cycled (off - flip switch - on) for the SPI to refresh the nand.

once working, remove switch and wire to CLPD. Much nicer not booting the console to verify your electronic work.

Find a RROD box. Each one has a magic suprise!
gazzaman2k
as do 16mb playstation 2 memory cards off ebay wink.gif
thugsters
QUOTE(ruciz @ Feb 15 2012, 07:56 PM) *

If you don't lift the pin you are going to cut the trace.. Choose one. Not sure about FT1T1 point, but if you lifted the pin you could solder the SB from the glitch chip to that then.

Not sure what all this lifting pin is about, but I have done over 15 dual nands so far and I never ever have had to live the original nand pin once. The conosle boots fine..Why cut the southbridge when there is no need to. Now I'm not sure about using it with the sync button, as I haven't attempted that yet and always use a switch, but with the switch you DO NOT have to life the original ce pin.
I don't post much at all but I felt I had to post this as so many are lifting pins and cutting the southbridge when using switches, and it is not needed. This also is not something I have just copied and pasted without testing, as I have said I have done this on over 15 dual nands and not once have had to lift a pin.
This was something I discovered over at xboxhacker btw. smile.gif
xiaotuanzi
i just flick both switchers togther also i hooked it to a blue led on the center ring of light to show when its on
uN0pEn
Nice. Cant wait to do installs for this.
thugsters
Here's my simple diagram again with what I had to do to be able to turn glitch chip off so I could boot original nand. Seems to be working good so far, but have no clue if using the shared 3.3v is a good idea or not.

IPB Image

Both dashes are on 14717 and now booting like they should again biggrin.gif
ruciz
QUOTE(thugsters @ Feb 21 2012, 05:18 PM) *

Here's my simple diagram again with what I had to do to be able to turn glitch chip off so I could boot original nand. Seems to be working good so far, but have no clue if using the shared 3.3v is a good idea or not.

IPB Image

Both dashes are on 14717 and now booting like they should again biggrin.gif


to disable the chip CE has to be held to 3v3, enable is grounded I believe... least thats what the datasheet says, topic install shows, the 360 schematic displays, and in my experience works.

With your diagram, if no lines are cut, position 2 would leave nand2 enabled, but 3V3 running to FT1T1, which is the CE pin, which isn't cut, which means the CE control would be held high on the southbridge.. in my experience, it didn't like this and wanted to be directly connected itself to the CE (IE grounded) I assume the system verifies this, sees the nand is 'off', which causes it to halt booting?

FT1T1 is testpoint 1, directly connected to the CE pin on the chip.
If you are using no resistors with your diagram connecting the CE and the glitch chip to the same 3V3 supply shouldn't be a problem.

do you have the two dashes setup for one online and one homebrew? did you have to change any LDV count?
thugsters
yes I have two dashes setup, one for rgh/fsd and one for online. I'm looking at changing my setup now though as I'm told over at another site that even though it works this setup may cause damage in the long run..

This was the reply I got
"the CE (chip enable nand) needs to be at low to be acceced, so the southbridge puts it at logic low (GND), what you are doing is putting the CE of mortherboard to 3,3v in order to put the original nand on standby, while on the other side you put CE2 (second nand) to 0 to active that nand.

Since the southbridge forces CE1 (original nand) to 0 and you are sending 3,3v on it that means each time your playing on second nand it's like if your sending a short from 3,3v to 0 onto the southbridge, so yes it is harmful over time, even if the current (mA) is not that high, over time you can have problems.... I wouldn't do that my self

On top of that the nand is only read 200ms on SMC reset and at the begening of boot that means once those 200ms are done you don't need to put CE from nands to low (GND), that means if you were sending those 3,3v only or those 200ms for each boot that would be no problem, but since you keep that to 3,3v on southbridge the hole time you use nand2 (maybe hours of playing) then it's no good at all and over time it could be harmful for the southbridge"

So I'm not looking at a different setup before it's too late and my box dies or chip smile.gif
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